1. Field of the Invention
This invention relates generally to wireless communication systems, more specifically, to signal reception in a wireless communication system.
2. Description of the Related Art
Wireless systems are becoming a fundamental mode of communication in modern society. In order for wireless systems to continue to penetrate into the telecommunications market, the cost of providing the service must continue to decrease and the convenience of using the service should continue to increase. Several industry standard communication techniques have been developed based upon digital modulation schemes. For example, code division multiple access (CDMA), time division multiple access (TDMA) and frequency hopping techniques have been used to develop modern communication systems. As these systems are implemented in parallel with one another, it is often advantageous to have a receiver that is capable of communication using more than one of these standardized techniques. In order to do so, it is necessary to have a receiver that is capable of receiving signals which have been modulated according to several different modulation techniques.
Conventional receivers are implemented using double conversion receiver architectures. A double conversion receiver architecture is characterized in that the received radio frequency (RF) signal is converted to an intermediate frequency (IF) signal and the IF signal is subsequently converted to a baseband signal. In addition, gain control can also be applied at the IF. However, double conversion receivers have the disadvantage of utilizing a great number of circuit components, thereby, increasing the cost, size and power consumption of the receiver. An example of such a receiver is a superheterodyne receiver which uses frequency mixing or heterodyning to convert a received signal to a fixed IF signal, which can be more conveniently processed than the original radio carrier frequency.
Conventional analog receivers have traditionally used some variation of the superheterodyne approach generally consisting of an input coarse band selection filter, an amplifier stage, and one or more downconversion stages. The objective of the downconversion stage(s) is to translate the signal of interest into one or more intermediate frequencies, where the task of selecting the signal of interest (and rejecting other signals/noise) can be managed most efficiently given the limitations of passive filter technology. FIG. 1 discloses a representative block diagram of a typical superheterdyne receiver. Additional downconversion stages are often used to improve performance.
It is useful to perform downconversion using “in-phase” and “quadrature” versions of a local oscillator. Doing this has many advantages including avoiding an inherent drawback of superheterodyne architectures, namely that they tend (without input filtering) to work at two different input frequencies. I-Q reception tends to cancel out one of these images. A typical block diagram of a superheterodyne using the I-Q approach is shown in FIG. 2.
While superheterodyne receivers have achieved some limited level of sophistication with the advent of high speed analog-to-digital converter (ADC) technology, thus allowing the digital processing of the final IF output(s), the basic anatomy of the superheterodyne receiver has remained unchanged. Consequently the performance parameters of the receiver, specifically the ability to be tuned across a wide range of frequencies and the dynamic range, are limited by the behavior of the front end analog circuits.
An improvement to the conventional superheterodyne receiver is disclosed in “Direct Conversion Delta-Sigma Digital Receiver” (U.S. Pat. No. 6,748,025 to Hickling). In this architecture, frequency downconversion is integrated into the switching tree of a specialized delta-sigma converter, resulting in the ability to simultaneously downconvert an RF signal and quantize the resulting signal. A block diagram of the scheme for the “Direct Conversion Delta-Sigma Digital Receiver” is shown in FIGS. 3a-3b. FIG. 3a shows the configuration of a basic ADC front end, while FIG. 3b shows two front end circuits used together in an I-Q arrangement.
The “Direct Conversion Delta-Sigma Digital Receiver” represents a significant breakthrough in that it permits realization of a widely continuously tunable receiver front end, limited only by the available tuning range of the input clock signal. The circuit has been shown to have an input signal operating range between less than 100 MHz and greater than 6 GHz, with a dynamic range of slightly less than 60 dB.
The limitations of conventional superheterodyne receivers are generally understood in the art and include the need for a high resolution local oscillator (LO) due to the fact that the intermediate frequency must be placed precisely in the middle of the passband of a piezoelectric passive filter (crystal or SAW). Producing a synthesizer that is both widely tunable and simultaneously having low phase noise poses a fundamental challenge since the it necessitates that the loop have a large feedback divider ratio (and is consequently very “loose”—i.e., the rate at which it updates its phase error information and corrects the frequency of the voltage controlled oscillator (VCO) is very slow). Another limitation is the reliance on passive filter technology. Consequently, the user must make the choice to use a design that includes a very steep, fixed frequency filter, such as a typical IF filter, or must deal with “low Q” transfer functions in tunable filters. Unlike digital filter technology, the designer must choose between tunability and selectivity. Also, the front end designs of conventional superheterodyne receivers that are widely tunable are by necessity unwieldy because they require dividing the frequency range into bands and to use a completely different filter network for each band.